Most quantum computers depend on racks of room-temperature electronics wired down into a cryostat, one connection per control signal, per qubit. That wiring, not qubit physics, is one of the real limits on how many qubits a machine holds. On July 29, 2026, HRL Laboratories published a result in Nature that attacks this problem directly: a silicon quantum processor with its own control chip living inside the cryostat, running error correction on its own.
What HRL built
The device holds 18 qubits. Next to them, inside the same cryostat, sits a custom CMOS controller operating at around minus 450 degrees Fahrenheit, close to the qubits themselves rather than at room temperature. That controller generates every signal the error-correction routine needs and runs the whole cycle with no real-time input from outside the cold chamber. A high-density ribbon cable, 296 channels of superconducting niobium on polyimide, connects the pieces while managing the heat load a control chip normally cannot tolerate at those temperatures.
The controller chip itself was manufactured at a commercial foundry, the same kind of manufacturing step behind IonQ's recent purchase of SkyWater Technology and GlobalFoundries' new silicon photonics funding. None of these stories are about qubit physics. All three are about the unglamorous manufacturing and packaging work that decides whether a lab result becomes a machine you scale.
Why moving the controller matters more than it sounds
Every wire running from room temperature into a cryostat carries heat with it, and heat is the enemy of a qubit that needs to stay near absolute zero. Today's largest machines manage this by keeping wiring counts down, which caps how many qubits fit on one system before the cooling and wiring overhead becomes the bottleneck rather than the qubits themselves. A control chip that lives in the cold zone and runs error correction locally removes a big share of that wiring, one wired connection per function instead of one per qubit.
That is a real, checkable engineering claim, and it is a different kind of claim than a qubit count or a fidelity number. It says nothing about how good HRL's 18 qubits are compared to a superconducting or trapped-ion qubit elsewhere. It says something about whether a silicon-based approach scales its control infrastructure without the wiring problem growing linearly with qubit count.
Where this sits next to other 2026 scaling work
Warwick researchers published a different answer to a related scaling problem the same week: how to let distant qubits on one chip communicate at all, rather than only their nearest neighbors. Read together, the two results point at the same underlying truth. Qubit count and gate fidelity get the headlines, but wiring, control electronics, and qubit-to-qubit communication are the problems that decide whether a design reaches a million qubits or stalls in the hundreds.
HRL's result is a working 18-qubit device with a published, peer-reviewed result behind it, not a concept paper. That distinction is worth holding onto as you read coverage of scaling claims generally. A demonstrated device at a small scale is a different kind of evidence than a proposed mechanism aimed at a much larger one, even when both are genuine contributions. For more on how silicon-based qubits compare to the trapped-ion, superconducting, and photonic approaches competing for the same scaling problem, see our hardware overview and industry landscape.