Every few months a press release announces a new record qubit count. Almost none of them tell you the number that decides whether the machine can do anything: the error rate.
This is not a pedantic complaint. The relationship between qubit count and computational power in quantum computing is not merely noisy — it can invert. Under the right conditions, a machine with more qubits is worse than one with fewer. Understanding why requires one distinction, and once you have it, most quantum computing news becomes far easier to read.
Two things called "qubit"
A physical qubit is a piece of hardware: a superconducting circuit on a chip, a trapped ion held in an electromagnetic field, a neutral atom in an optical tweezer. It is a real object subject to real physics, which means it drifts, absorbs stray energy, and loses its quantum state on a timescale measured in microseconds to seconds. That decay is decoherence, and the T1 and T2 times that quantify it are among the few hardware specs worth reading closely.
A logical qubit is not hardware. It is a qubit's worth of quantum information spread across many physical qubits, arranged so that errors on individual members can be detected and undone without ever measuring — and thereby destroying — the encoded state. IonQ describes logical qubits as software-defined, and that framing is a good one: the logical qubit is a construction that hardware supports rather than a thing you can point at.
The technique is quantum error correction, and our companion post on QEC covers the mechanics — parity checks, ancilla qubits, the surface code lattice. This post is about the accounting: what encoding costs, when it pays off, and what else fault tolerance demands beyond the encoding itself.
Why "how many qubits?" is nearly meaningless
Here is the uncomfortable arithmetic. If your physical error rate is above the threshold of your error-correcting code, encoding does not help. The extra qubits and the extra gates needed to perform parity checks each introduce errors of their own. Add more of them and you add more noise than you remove. A headline of 1,000 physical qubits with mediocre fidelity is compatible with zero logical qubits — not few, zero.
Meanwhile a smaller, cleaner machine can be strictly more useful. IonQ argues this point aggressively, claiming that a system of 100 physical qubits at 99.99% two-qubit gate fidelity would likely outperform a 10,000-qubit system of lower-quality qubits encoding 100 logical ones — on overhead, gate speed, universality, and energy. That's a vendor making a case for its own architecture and should be read as such, but the underlying logic is sound and widely accepted: quality compounds in a way that quantity does not.
The compounding is the key mechanism. In a code that corrects one error, roughly speaking, halving the physical error rate can quarter the logical error rate; in a code correcting two errors the same improvement gives about an eight-fold gain. IonQ makes this multiplicative argument explicitly, and it explains why hardware teams chase fidelity improvements that look small in isolation. A 2x hardware win is a 4x or 8x win after encoding.
This is also why single-number benchmarks keep failing the field. Quantum Volume, algorithmic qubits, gate counts — each captures a slice and hides the rest. We wrote about that measurement problem in the context of EO 14413, and it applies with full force here.
The overhead is the whole story
How many physical qubits does one logical qubit cost? The honest answer is that it depends on two numbers you have to state together: your physical error rate and the logical error rate you're targeting.
Shor's 1995 code, the first quantum error-correcting code ever written down, used nine physical qubits to protect one logical qubit against an arbitrary single-qubit error. That was a proof that the thing was possible at all — before it, many physicists believed no-cloning made quantum computing hopeless in principle.
Nine turned out to be optimistic for practical machines. Kitaev's 1997 work on anyons introduced topological codes, including the surface code, which stores information in global properties of a 2D lattice rather than in any individual site. Its great virtue is that every parity check involves only neighbouring qubits, which maps cleanly onto flat chips, and it tolerates physical error rates around 1% — high enough that real hardware can plausibly reach it.
The price is scale. Surface code overhead grows with code distance, and realistic estimates for running a cryptographically relevant algorithm land at hundreds to a few thousand physical qubits per logical qubit, with total system requirements often quoted in the millions. Push your physical error rate down and that ratio falls fast; let it drift up toward threshold and the ratio explodes. Overhead is not a fixed constant of the technology — it is a function of how good your hardware is.
Newer code families are attacking the ratio directly. IonQ has promoted a bivariate bicycle variant it calls BB5, claiming an idle logical error rate around 5x10⁻⁵ using 50 physical qubits, roughly four times smaller than standard BB codes. Vendor-reported figures like that are worth tracking but not worth treating as settled until independently reproduced.
The threshold theorem, and why 2024 mattered
The theoretical foundation under all of this is the threshold theorem. It says there exists a critical physical error rate. Below it, increasing the size of your code suppresses logical errors exponentially — you can make them as small as you like by spending more qubits. Above it, the opposite: bigger codes are worse codes.
For decades this was a theorem without an experiment. Every roadmap in the industry assumed the crossing was achievable; none had demonstrated it.
That changed with Google's below-threshold result in 2024. Running surface codes at distances 3, 5, and 7 on its 105-qubit Willow processor, the team observed each increase in code distance roughly halving the logical error rate — the direction fault tolerance requires. Critically, the encoded logical qubit outlived the best individual physical qubit on the chip, which is the concrete test of whether error correction is a net win rather than an expensive way to add noise.
It's hard to overstate the significance. That experiment converted large-scale quantum computing from an open physics question into a scaling and engineering problem. Engineering problems are hard, but they are a different category of hard.
Different hardware, different arithmetic
The threshold is not a single universal number — it depends on the code, and which codes are practical depends on your hardware's connectivity. This is where modality differences stop being trivia.
Superconducting processors offer fast gates (nanoseconds) and mature fabrication, but qubits interact only with their planar neighbours and fidelities are typically lower. That planar constraint is precisely what the surface code was designed around, which is why superconducting roadmaps are built on it.
Trapped ions invert the trade: gates are far slower (microseconds to milliseconds), but fidelities are the highest of any modality and connectivity is effectively all-to-all — any ion in a chain can be entangled with any other without a chain of intervening swap operations. IonQ argues this connectivity is a structural advantage for error correction, because codes requiring non-local checks become implementable rather than prohibitively expensive, and it has claimed 99.99% physical two-qubit gate fidelity via its Oxford Ionics acquisition. Again: vendor claim, vendor benchmark conditions.
Neither is obviously winning. Our hardware overview and modality comparison go into the specifics, and the broader industry landscape tracks who is betting on what. The practical takeaway for anyone learning is that connectivity and fidelity, not qubit count, are the specs that determine which error-correction strategies a machine can even attempt.
Encoding is necessary, not sufficient
A subtlety that gets lost in coverage: storing a logical qubit is the easy part of fault tolerance. Computing on one is harder. A genuinely fault-tolerant machine needs all of the following:
Fault-tolerant gate operations. Logical gates must be implemented so that a single physical fault cannot propagate into an uncorrectable logical error. Some gates are cheap in a given code; others are not.
Continuous syndrome extraction. Parity checks run constantly, in rounds, throughout the computation. The measurement circuits are themselves noisy, so the scheme has to tolerate faults in its own error detection.
Magic state distillation. Surface codes give you Clifford gates relatively cheaply, but Clifford gates alone are classically simulable. Universality needs a non-Clifford gate — typically T — and those are produced by distilling noisy "magic states" into clean ones. Distillation factories can consume a large fraction of the total qubit budget in realistic architectures.
Real-time decoding. Syndrome data must be interpreted and corrections applied faster than errors accumulate. This is a classical computing problem, running at microsecond latency alongside the QPU, and it's a serious engineering constraint in its own right.
IonQ's framing here is useful regardless of the vendor context: a logical qubit should be characterised by several attributes together — overhead, idle logical error rate, logical gate fidelity, logical gate speed, and gate-set universality — rather than counted. A logical qubit that can be stored but not usefully operated on is not much of a logical qubit.
Where the field actually is
Honest summary as of mid-2026: logical qubits are real, demonstrated, and few.
Multiple groups have encoded them. Google has shown error suppression scaling in the right direction. Trapped-ion and neutral-atom teams have run algorithms on small numbers of encoded qubits. These are genuine milestones, not marketing.
But useful fault-tolerant computation needs hundreds to thousands of logical qubits executing millions of logical operations, and that means physical qubit counts several orders of magnitude beyond anything running today, with error rates comfortably below threshold across the whole device rather than on the best-behaved corner of a chip. Most working hardware remains firmly in the NISQ regime that Preskill named in 2018, where error mitigation — statistical post-processing rather than true correction — is the practical tool.
None of which means waiting around. The abstractions transfer: circuits, gates, measurement, and noise behave the same way whether you're on a simulator or a fault-tolerant machine a decade out. You can start on free simulators or real QPUs today, and the courses page collects structured routes in.
The one habit worth forming
When you next see a qubit-count headline, ask three questions: what is the two-qubit gate fidelity, is it below the relevant threshold, and how many logical qubits does that imply?
Frequently the answer to the third is zero, and the article won't have mentioned it. Learning to notice that gap is most of what separates informed reading from press-release reading — and the glossary is a decent place to build the vocabulary for it.